#!/bin/bash

# A9 SoC 真实世界 Verilog 文件测试脚本
# 测试 a9soc/design 目录下的各种模块

set -e

SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
cd "$SCRIPT_DIR/.."  # 进入 modb 目录

echo "=== A9 SoC 真实世界 Verilog 测试开始 ==="
echo "时间: $(date)"
echo "目录: $(pwd)"
echo

# 测试统计
TOTAL_TESTS=0
PASSED_TESTS=0
FAILED_TESTS=0

# 测试函数
test_verilog_file() {
    local file="$1"
    local test_name="$2"
    local output_file="test_$(basename "$file" .v).modb"
    
    TOTAL_TESTS=$((TOTAL_TESTS + 1))
    
    echo -n "测试 $test_name ... "
    
    # 检查文件是否存在
    if [[ ! -f "$file" ]]; then
        echo "文件不存在"
        FAILED_TESTS=$((FAILED_TESTS + 1))
        return 1
    fi
    
    # 解析文件
    if ./moparse -v "$file" -o "$output_file" >/dev/null 2>&1; then
        # 检查结果
        local modules=$(./moparse -s "$output_file" 2>/dev/null | grep "模块名:" | wc -l)
        if [[ $modules -gt 0 ]]; then
            echo "通过 ($modules 模块)"
            PASSED_TESTS=$((PASSED_TESTS + 1))
            rm -f "$output_file"  # 清理
            return 0
        else
            echo "失败 (无模块)"
            FAILED_TESTS=$((FAILED_TESTS + 1))
            return 1
        fi
    else
        echo "失败 (解析错误)"
        FAILED_TESTS=$((FAILED_TESTS + 1))
        return 1
    fi
}

# 测试批量处理
test_batch_processing() {
    local list_file="$1"
    local test_name="$2"
    local output_file="batch_test.modb"
    
    TOTAL_TESTS=$((TOTAL_TESTS + 1))
    
    echo -n "测试 $test_name ... "
    
    if ./moparse -f "$list_file" -o "$output_file" >/dev/null 2>&1; then
        echo "通过"
        PASSED_TESTS=$((PASSED_TESTS + 1))
        rm -f "$output_file"
        return 0
    else
        echo "失败"
        FAILED_TESTS=$((FAILED_TESTS + 1))
        return 1
    fi
}

echo "1. 单文件解析测试"
echo "=================="

# Timers 模块测试
test_verilog_file "../a9soc/design/Timers/src/Timers.v" "Timers主模块"
test_verilog_file "../a9soc/design/Timers/src/TimersFrc.v" "TimersFrc模块"
test_verilog_file "../a9soc/design/Timers/src/TimersRevAnd.v" "TimersRevAnd模块"

# 生成文件测试
test_verilog_file "../a9soc/bin/gen/chip.v" "芯片顶层"
test_verilog_file "../a9soc/bin/gen/pmu_reg.v" "PMU寄存器"
# 跳过 sysc_reg.v，文件过大 (16485行)
echo "跳过 sysc_reg.v (文件过大，16485行)"

# AHB总线测试
test_verilog_file "../a9soc/design/ahb_bus/src/DW_ahb.v" "AHB总线"
test_verilog_file "../a9soc/design/ahb_bus/src/DW_ahb_arb.v" "AHB仲裁器"

# A9处理器核心文件测试（较大的文件）
test_verilog_file "../a9soc/design/a9/src/1024x21_L.v" "A9缓存标签"
test_verilog_file "../a9soc/design/a9/src/512K_DATARAM.v" "A9数据RAM"

echo
echo "2. 复杂文件测试"
echo "=============="

# 测试复杂的A9核心文件
test_verilog_file "../a9soc/design/a9/src/A9_L2_DAPLite_top.v" "A9核心顶层"

echo
echo "3. 其他子系统测试"
echo "================"

# 查找并测试其他模块
if [[ -f "../a9soc/design/gpio/src/gpio.v" ]]; then
    test_verilog_file "../a9soc/design/gpio/src/gpio.v" "GPIO控制器"
fi

if [[ -f "../a9soc/design/uart/src/uart.v" ]]; then
    test_verilog_file "../a9soc/design/uart/src/uart.v" "UART控制器"
fi

if [[ -f "../a9soc/design/i2c/src/i2c.v" ]]; then
    test_verilog_file "../a9soc/design/i2c/src/i2c.v" "I2C控制器"
fi

echo
echo "4. 批量处理测试"
echo "=============="

# 创建安全的文件列表用于批量测试
cat > safe_batch_test.list << EOF
# 安全的批量测试文件列表
../a9soc/design/Timers/src/Timers.v
../a9soc/bin/gen/pmu_reg.v
EOF

test_batch_processing "safe_batch_test.list" "安全批量处理"

# 创建包含更多文件的列表
cat > extended_batch_test.list << EOF
# 扩展批量测试文件列表
../a9soc/design/Timers/src/Timers.v
../a9soc/design/Timers/src/TimersFrc.v
../a9soc/bin/gen/pmu_reg.v
../a9soc/bin/gen/sysc_reg.v
EOF

test_batch_processing "extended_batch_test.list" "扩展批量处理"

echo
echo "5. 反向生成测试"
echo "=============="

echo -n "测试反向生成功能 ... "
if ./moparse -v "../a9soc/design/Timers/src/Timers.v" -o "reverse_test.modb" >/dev/null 2>&1; then
    if ./moparse -i "reverse_test.modb" -m "Timers" -oe "reverse_output.v" >/dev/null 2>&1; then
        if [[ -f "reverse_output.v" ]] && grep -q "module Timers" "reverse_output.v"; then
            echo "通过"
            PASSED_TESTS=$((PASSED_TESTS + 1))
            rm -f "reverse_test.modb" "reverse_output.v"
        else
            echo "失败 (生成内容错误)"
            FAILED_TESTS=$((FAILED_TESTS + 1))
        fi
    else
        echo "失败 (反向生成失败)"
        FAILED_TESTS=$((FAILED_TESTS + 1))
    fi
    TOTAL_TESTS=$((TOTAL_TESTS + 1))
else
    echo "失败 (源文件解析失败)"
    FAILED_TESTS=$((FAILED_TESTS + 1))
    TOTAL_TESTS=$((TOTAL_TESTS + 1))
fi

echo
echo "6. 性能测试"
echo "=========="

echo -n "测试大文件解析性能 ... "
start_time=$(date +%s%N)
if ./moparse -v "../a9soc/design/a9/src/A9_L2_DAPLite_top.v" -o "performance_test.modb" >/dev/null 2>&1; then
    end_time=$(date +%s%N)
    duration=$(((end_time - start_time) / 1000000))  # 转换为毫秒
    echo "通过 (${duration}ms)"
    PASSED_TESTS=$((PASSED_TESTS + 1))
    rm -f "performance_test.modb"
else
    echo "失败"
    FAILED_TESTS=$((FAILED_TESTS + 1))
fi
TOTAL_TESTS=$((TOTAL_TESTS + 1))

# 清理临时文件
rm -f safe_batch_test.list extended_batch_test.list

echo
echo "=== 测试结果总结 ==="
echo "总测试数: $TOTAL_TESTS"
echo "通过: $PASSED_TESTS"
echo "失败: $FAILED_TESTS"
echo "通过率: $(( (PASSED_TESTS * 100) / TOTAL_TESTS ))%"

if [[ $FAILED_TESTS -eq 0 ]]; then
    echo "🎉 所有测试都通过了！"
    exit 0
else
    echo "⚠️  有 $FAILED_TESTS 个测试失败。"
    exit 1
fi